This book analyses different A/D-converter architectures with an emphasis on the maximum achievable power efficiency. It also provides an accessible overview of the state-of-the art in calibration techniques for Nyquist A/D converters. The calibration techniques presented are applicable to other analog-to-digital systems, such as those applied in integrated receivers. They allow implementation without introducing a speed or power penalty.
Nyquist AD Converters Sensor Interfaces and Robustness
This book is based on the 18 presentations during the 21st workshop on Advances in Analog Circuit Design. Expert designers provide readers with information about a variety of topics at the frontier of analog circuit design, including Nyquist analog-to-digital converters, capacitive sensor interfaces, reliability, variability, and connectivity. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.
Digital Calibration Algorithms for Nyquist rate Analog to Digital Converters
Abstract: Continuous scaling down of CMOS device sizes and an accompanied increase in device switching speeds prompts the design of mixed-signal systems with increasingly complex digital signal processing and control algorithms accompanied by simpler analog circuitry. Analog to digital converter (ADC) is an essential mixed-signal component of modern receivers, where signals sensed from the source are converted to digital for further signal processing on them. In this dissertation, calibration techniques are presented which allow ADCs to be designed with large inherent gain and offset errors. The concept of arbitrary radix multistep conversion is presented, along with algorithms that enable reduced radix conversion with digital correction in pipelined or algorithmic ADCs. Calibration techniques that account for linear and nonlinear gain error are presented and adapted to the popular 1.5 bit/stage pipeline architecture. Calibration is performed purely with digital post-processing on ADC output bits, with no changes occurring in the analog hardware. In this dissertation a WCDMA/WLAN receiver architecture is presented and specifications are derived for all its components. Concept of reconfigurable ADC design is presented, which allows speed and power consumption optimization. Reduced radix digital correction, linear and nonlinear calibration and background-calibrating queues are presented and combined in two behavioral models. The reconfigurable ADC was fabricated in AMI0.5u 3V CMOS process, and achieved 55dB dynamic range at 45MS/s, consuming 51mW power. The reconfigured calibrated ADC was simulated in TSMC 0.18u 1.8V CMOS process, and achieved 63dB dynamic range at 25MS/s, consuming 3.6mW power. Measurements of the capture card showed a 1.6bit improvement in resolution with the use of calibration algorithms.
Modern RF receivers and transmitters require quadrature oscillators with accurate quadrature and low phase-noise. Existing literature is dedicated mainly to single oscillators, and is strongly biased towards LC oscillators. This book is devoted to quadrature oscillatorsand presents adetailed comparative study ofLC and RCosc- lators, both at architectural and at circuit levels. It is shown that in cross-coupled RC oscillators both the quadrature error and phase-noise are reduced, whereas in LC - cillators the coupling decreases the quadrature error, but increases the phase-noise. Thus, quadrature RC oscillators can be a practical alternative to LC oscillators, - pecially when area and cost are to be minimized. The main topics of the book are: cross-coupled LC quasi-sinusoidal oscillators, cross-coupled RC relaxation oscillators, a quadrature RC oscillator-mixer, and t- integrator oscillators. The effect of mismatches on the phase-error and the pha- noise are thoroughly investigated. The book includes many experimental results, obtained from different integrated circuit prototypes, in the GHz range. A structured design approach is followed: a technology independent study, with ideal blocks, is performed initially, and then the circuit level design is addressed. This book can be used in advanced courses on RF circuit design. In addition to post-graduate students and lecturers, this book will be of interest to design engineers and researchers in this area.
This book describes ultra low power capacitive sensor interfaces, and presents the realization of a very low power generic sensor interface chip that is adaptable to a broad range of capacitive sensors. The book opens by reviewing important design aspects for autonomous sensor systems, discusses different building blocks, and presents the modular architecture for the generic sensor interface chip. Finally, the generic sensor interface chip is shown in state-of-the-art applications.
The book reports modeling and simulation techniques for substrate noise coupling effects in RFICs and introduces isolation structures and design guides to mitigate such effects with the ultimate goal of enhancing the yield of RF and mixed signal SoCs. The book further reports silicon measurements, and new test and noise isolation structures. To the authors’ knowledge, this is the first title devoted to the topic of substrate noise coupling in RFICs as part of a large SoC.